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CXMT president Cao Kanyu stated at the Integrated Chips and Chiplets Conference that the company plans to launch its first 4F² product, a server DDR5 RDIMM, by the end of the year. This memory will utilize a denser cell layout featuring vertical transistors designed to reduce the cell footprint by approximately one-third. Cao explained that the Vertical Surrounded Gate (VSG) transistor has a channel standing vertically with a gate wrapped around it, which allows for stronger control and less leakage while shrinking the cell size.

The company has filed patents and published research papers on this technology in 2021, 2023, and 2025, including an 8Gb full-array demonstration at IEDM 2023. Cao noted that CXMT now holds over 300 patent families related to 4F². While the industry is moving toward 4F² solutions using wafer-level hybrid bonding to decouple DRAM and CMOS processes, no specific speeds or capacities have been announced for this new product yet.

In contrast, Samsung has shown a working 4F² vertical-channel transistor die on its sub-10nm "10a" process, though South Korean reports suggest mass production timelines are unclear. SK hynix plans to debut its 4F² platform at the 10b node in April. Despite these competitors having more concrete roadmaps, CXMT’s announcement remains significant as it marks a potential entry into this advanced technology space without yet revealing detailed product specifications or confirmed customer orders.